What benefits can AutoDV bring to clients? First, it can be used to integrate methodologies used by internal enterprise users, establishing a centralized knowledge repository. This provides a unified platform for companies, facilitating smoother knowledge sharing and collaboration. Additionally, AutoDV features automatic SoC parsing, drag-and-drop Transactor attachment, and verification platform generation, offering a quick solution for generating verification platforms with each design revision. In summary, using AutoDV can significantly reduce verification time, compressing what might normally take weeks or even months into just days or a few weeks. This not only enhances efficiency but also ensures accuracy and consistency in verification due to its unified framework.

Whether you need SoC-level verification or quick generation of verification platforms for different versions, AutoDV is your optimal choice, delivering high-quality verification results efficiently to drive greater success for your projects.

TESDA SoC Verification Solution

AutoDVâ Boosts Verification Efficiency Dramatically!

TESDA SoC AutoDVâ Verification Reuse Framework

  • Target for SoC level verification, transactors will encapsulate test knowledge at SoC level
  • Transactor library will serve as a reuse framework for all users
    – Align corporate user methodology
    – Centralized knowledge base
  • Automatic SoC parsing, transactor attachment and test bench generation
    – Fast test bench generation for each revision

TESDA Solution Phase II: WARP for Multi-Core SoC